Learnizo - Online Tuition Platform Logo
Chat with us on WhatsAppCall Learnizo

KTU 2024 Scheme · Semester 4 · Common to CS/CD/CR/CA/AD/CB/CN/CC/CU/CG

Computer Organization and Architecture (PBCST404) Syllabus

Official KTU 2024 Scheme syllabus for Computer Organization and Architecture, Semester 4, Common to CS/CD/CR/CA/AD/CB/CN/CC/CU/CG (Computer Science and Engineering).

This page compiles APJ Abdul Kalam Technological University's officially published 2024 Scheme syllabus for Computer Science and Engineering, Semester 4, sourced directly from KTU's official website (ktu.edu.in). Learnizo is an independent online tuition platform and is not affiliated with, endorsed by, or officially connected to APJKTU. The university may revise syllabus content after this page was last updated — always cross-check with the official KTU source for the current, authoritative version.

Course Code

PBCST404

Credits

4

Teaching Hours

3:0:0:1 (L:T:P:R) — Project Based Learning (PBL)

CIE Marks

60

ESE Marks

40

Exam Duration

2 Hrs 30 Min

Prerequisites

GAEST305 (Digital Electronics and Logic Design)

Semester

Semester 4

Course Objective

To introduce principles of computer organization and the basic architectural concepts using RISC, and to introduce the concepts of microarchitecture, memory systems, and I/O systems.

Module-wise Syllabus

Module 1

11 contact hours

Basic Structure of Computers: functional units, basic operational concepts, memory map, endianness. CISC vs RISC architectures: RISC introduction — assembly language, assembler directives, assembling. Programming concepts: program flow, branching, conditional statements, loops, arrays, function calls, instruction execution cycle. Machine language: instructions, addressing modes, stored program concept. Evolution of the RISC architecture.

Module 2

11 contact hours

Microarchitecture: introduction, performance analysis. Single-cycle processor: single cycle datapath, single cycle control. Pipelined processor: pipelined data path, pipelined control — hazards, solving data/control hazards, performance analysis.

Module 3

11 contact hours

Memory Systems: introduction, performance analysis. Caches: basic concepts, cache mapping, cache replacement, multiple-level caches, reducing miss rate, write policy. Virtual memory: address translation, page table, translation lookaside buffer, memory protection.

Module 4

11 contact hours

Input/Output: external devices, I/O modules, programmed I/O, interrupt driven I/O, direct memory access. Embedded I/O systems: embedded I/O, general purpose I/O, serial I/O, other peripherals. Includes a mandatory mini-project using simulators such as Ripes or GEM5 (e.g. cache organization study, hazard solutions, TLBs).

Course Outcomes

  • CO1Identify the basic structure and functional units of a digital computer and the features of RISC architecture.
  • CO2Experiment with the single cycle processor, pipelining, and the associated problems.
  • CO3Utilize the memory organization in modern computer systems.
  • CO4Experiment with the I/O organization of a digital computer.

Assessment Pattern (CIE: 60 marks, ESE: 40 marks)

Continuous Internal Evaluation (CIE)

Attendance5
Project30
Internal Examination 1 (Written)12.5
Internal Examination 2 (Written)12.5

End Semester Examination (ESE)

Total 40 marks, 2 Hrs 30 Min. See the official KTU syllabus document for the exact Part A / Part B question pattern for this course.

Textbooks & Reference Books

Textbooks

  • Digital Design and Computer Architecture - RISC-V Edition — Sarah L. Harris, David Harris (Morgan Kaufmann, 1st edition, 2022)
  • Computer Organization and Architecture: Designing for Performance — William Stallings (Pearson, 9th edition, 2013)

Reference Books

  • Computer Organization and Design: The Hardware/Software Interface, RISC-V Edition — David A. Patterson, John L. Hennessy (Morgan Kaufmann, 1st edition, 2018)
  • Computer Organization and Embedded Systems — Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Naraig Manjikian (McGraw Hill, 6th edition, 2012)
  • Modern Computer Architecture and Organization — Jim Ledin (Packt Publishing, 1st edition, 2020)

Frequently Asked Questions

How many credits is KTU Computer Organization and Architecture (PBCST404)?

4 credits, with 3:0:0:1 (L:T:P:R) — Project Based Learning (PBL) teaching hours per week, under the KTU 2024 Scheme.

How many modules are in the PBCST404 syllabus?

4 modules, 44 total contact hours.

What is the CIE and ESE mark split for this course?

CIE (Continuous Internal Evaluation): 60 marks. ESE (End Semester Examination): 40 marks, 2 Hrs 30 Min. Total: 100 marks.

What are the recommended textbooks for PBCST404?

Digital Design and Computer Architecture - RISC-V Edition (Sarah L. Harris, David Harris); Computer Organization and Architecture: Designing for Performance (William Stallings).

Is this syllabus specific to one branch, or common to others too?

This Semester 4 course is listed under Common to CS/CD/CR/CA/AD/CB/CN/CC/CU/CG at KTU under the 2024 Scheme — check the course header above for which branches it's common to.

Need help with KTU Computer Organization and Architecture?

Learnizo offers live, 1-on-1 online tuition for KTU CSE subjects — matched to your exact module and semester.

Explore BTech CSE Tuition